Evaluating RF ESD protection design: An overview

Author

Chen, Guang ; Wang, Albert

Author_Institution

Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA

fYear

2004

Firstpage

205

Lastpage

208

Abstract

ESD (electrostatic discharge) protection design for RF ICs is a challenging design problem, for which one critical aspect is to properly characterize RF ESD protection designs. This paper presents an overview of RF ESD protection structure evaluation techniques including ESD zapping test, TLP (transmission line pulse) test and S-parameter measurement. Characterization results of typical ESD protection structures are discussed, based on which suitable RF ESD protection structures are suggested.

Keywords

S-parameters; electrostatic discharge; integrated circuit design; integrated circuit reliability; integrated circuit testing; protection; radiofrequency integrated circuits; transmission line theory; ESD protection structure evaluation techniques; ESD protection structures; ESD zapping test; RF ESD protection design; RF IC; S-parameter measurement; TLP test; electrostatic discharge; transmission line pulse test; Circuit synthesis; Circuit testing; Electrostatic discharge; MOSFET circuits; Parasitic capacitance; Protection; Pulse measurements; Radio frequency; Radiofrequency integrated circuits; Semiconductor diodes;

fLanguage

English

Publisher

ieee

Conference_Titel

Physical and Failure Analysis of Integrated Circuits, 2004. IPFA 2004. Proceedings of the 11th International Symposium on the

Print_ISBN

0-7803-8454-7

Type

conf

DOI

10.1109/IPFA.2004.1345597

Filename

1345597