• DocumentCode
    1614427
  • Title

    A Design for the 178-MHz WXGA 30-fps Optical Flow Processor Based on the HOE Algorithm

  • Author

    Matsumura, Tetsuya ; Kurokawa, Aoi ; Imamura, Kousuke ; Matsuda, Yoshio

  • Author_Institution
    Coll. of Eng., Nihon Univ., Koriyama, Japan
  • fYear
    2015
  • Firstpage
    31
  • Lastpage
    36
  • Abstract
    We propose an optical flow processor, which allows real-time processing of WXGA 30-fps at 178.3 MHz. By introducing the SOR method and a pipeline operation for the Gauss-Seidel method to the iterative flow calculation, computational complexity can be reduced to 14.5% when compared to the previous HOE processor. We decreased the area of the embedded memory by using the image division method, applying line memory, and optimizing the computation word length. The core size of the designed processor is 16.82 mm2 in 90 nm process technology, which is approximately 5% of the previous HOE processor. The processor can operate completely in parallel, which ensures high-resolution scalability.
  • Keywords
    embedded systems; image sequences; iterative methods; pipeline processing; Gauss-Seidel method; HOE processor; SOR method; WXGA; computation word length optimisation; computational complexity; embedded memory; frequency 178 MHz; hierarchical optical flow estimation; image division method; iterative flow calculation; line memory; optical flow processor; pipeline operation; size 90 nm; Adaptive optics; Computer vision; Image motion analysis; Motion compensation; Optical filters; Optical imaging; Pipelines; HOE; optical flow; processor; scalability;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2015 IEEE 18th International Symposium on
  • Conference_Location
    Belgrade
  • Print_ISBN
    978-1-4799-6779-7
  • Type

    conf

  • DOI
    10.1109/DDECS.2015.36
  • Filename
    7195664