A pseudo-flash A/D converter

The author proposes a compromise between a fully parallel and a half-flash converter. The novel circuit requires significantly less area than a flash converter but maintains its high conversion rate. The proposed pseudoflash approach represents an alternative for video range medium-resolution analog-to-digital converters. A complete n-bit conversion is achieved within a single clock cycle. By using sampled-data comparators, a rail-to-rail analog signal swing is possible. The practicality of the novel approach is demonstrated by a 7-b prototype circuit implemented by a 2-μm double-poly CMOS process