Title :
Integration of top metal layer with thick Cu/Black Diamond™ (BD)
Author :
Lihui, Guo ; Jie, Jeffrey Su Yong
Author_Institution :
Inst. of Microelectron., Singapore
Abstract :
Thick copper (Cu)/Black Diamond™ (BD) layer up to 4 μm has successfully been integrated in CMOS interconnect process as top metal layer. The work shows that BD film is easy to crack when its thickness is up to 4 μm. However, the stress in the entire dielectric film stack can be reduced by inserting one or few layers of dielectric material, BLOk™. Although the reduction of the tensile stress of the stack is insignificant, the inserted BLOk™ layer effectively prevents cracking from happening in the film stack. High performance RF inductors incorporating with 4 μm of Cu/BD to-metal-layer in CMOS interconnection have been achieved.
Keywords :
CMOS integrated circuits; copper; cracks; dielectric thin films; inductors; integrated circuit interconnections; integrated circuit metallisation; integrated circuit modelling; integrated circuit reliability; integrated circuit testing; internal stresses; microwave devices; permittivity; stress analysis; 4 micron; BD film cracking; BD film thickness; BLOk dielectric layers; CMOS interconnect process; CVD carbon-doped silicon oxides; Cu; Cu/BD to-metal-layer; RF inductors; dielectric film stack stress reduction; film stack cracking prevention; low k dielectrics; tensile stress; thick Cu/Black Diamond top metal layer integration; CMOS integrated circuits; CMOS process; Copper; Delay; Radio frequency; Residual stresses; Semiconductor films; Silicon; Tensile stress; Thermal stresses;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits, 2004. IPFA 2004. Proceedings of the 11th International Symposium on the
Print_ISBN :
0-7803-8454-7
DOI :
10.1109/IPFA.2004.1345643
