• DocumentCode
    1614835
  • Title

    An interconnect technology for high density multichip systems

  • Author

    Jaafar, Maha A S ; Bajikar, Sateesh ; Denton, Denice D.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
  • fYear
    1992
  • Firstpage
    1249
  • Abstract
    The authors describe an interconnect technology used for high density multichip systems. The process involves the electroplating of through-holes in silicon (Si) substrates. These metallized holes act as interconnects between the levels of a three-dimensional multichip system. This method has the advantages of minimizing both system area and the delay times between chips
  • Keywords
    VLSI; electroplating; metallisation; multichip modules; Si; VLSI; electroplating; high density multichip systems; interconnect technology; metallized holes; three-dimensional multichip system; through-holes; Bonding; Delay; Etching; Fabrication; Geometry; Integrated circuit interconnections; Materials science and technology; Metallization; Packaging; Silicon;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
  • Conference_Location
    Washington, DC
  • Print_ISBN
    0-7803-0510-8
  • Type

    conf

  • DOI
    10.1109/MWSCAS.1992.271045
  • Filename
    271045