VLSI RNS implementation of fast IIR filters

A residue number system (RNS) method to implement fast recursive digital filters is considered. The speed improvement is obtained as a better performance of the elementary arithmetic blocks, given by the RNS. In the past the RNS double moduli method has been applied as a scaling procedure. In the present work a technique which uses this method partially is presented to improve the performance of recursive filters. This technique is based on the Chinese remainder theorem (CRT). Using CRT a partially parallelized structure can be realized which reduces the computational time and improves the speed performance. The effectiveness of this method has been tested numerically and by a 1.5-μm CMOS implementation of a second order infinite impulse response (IIR) filter cell