DocumentCode
1615065
Title
Control of etch and deposition for embedded SiGe
Author
Van Roijen, R. ; Kempisty, J. ; Sinn, C. ; Afoh, W. ; Tabakman, K. ; Logan, R.
Author_Institution
IBM Syst. & Technol., Hopewell Junction, VA, USA
fYear
2010
Firstpage
133
Lastpage
136
Abstract
Embedded SiGe is applied in CMOS at recent technology nodes to improve device performance and enable scaling. The position of the SiGe surface with respect to the channel is found to have significant impact on the pFET threshold voltage and also on device variability. Therefore the recess etch and deposition of the embedded SiGe has to be very well controlled. We show the sensitivity of the device to the fill process and describe the feed forward and feedback techniques used to optimize the control of epitaxy.
Keywords
CMOS integrated circuits; coating techniques; etching; silicon compounds; CMOS; SiGe; SiGe surface; deposition control; device performance; device variability; embedded SiGe; etch control; feedback techniques; feedforward techniques; pFET threshold voltage; Implants; Logic gates; Performance evaluation; Silicon; Silicon germanium; Surface treatment; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference (ASMC), 2010 IEEE/SEMI
Conference_Location
San Francisco, CA
ISSN
1078-8743
Print_ISBN
978-1-4244-6517-0
Type
conf
DOI
10.1109/ASMC.2010.5551434
Filename
5551434
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