DocumentCode :
161512
Title :
Implementation of V-band power amplifier with high linearity in 90nm CMOS technology
Author :
Heng-Ming Hsu ; Meng-Syun Chen ; Jun-Hong Weng
Author_Institution :
Dept. of Electr. Eng., Nat. Chung-Hsing Univ., Taichung, Taiwan
fYear :
2014
fDate :
8-9 May 2014
Firstpage :
201
Lastpage :
204
Abstract :
This study used 90-nm CMOS technology to design a power amplifier (PA) applicable to the V-band operation. The on-chip transformers play the power combination roles that were used to design the input, interstage and output impedance matching networks. To alleviate the power loss, the ground shielding technique is employed in proposed transformer. The measurement results indicated that the output power and OP1dB achieve 13.2dBm and 11.6dBm, respectively. The gain was 10dB, the bandwidth is 20GHz, ranging from 55GHz to 75GHz, the power added efficiency was 4.1% at 60GHz, and the power dissipation was 430mW.
Keywords :
CMOS analogue integrated circuits; impedance matching; millimetre wave integrated circuits; millimetre wave power amplifiers; CMOS technology; PA; V-band power amplifier; bandwidth 20 GHz; efficiency 41 percent; frequency 55 GHz to 75 GHz; gain 10 dB; ground shielding technique; impedance matching networks; on-chip transformers; power 430 mW; power combination roles; power loss; size 90 nm; CMOS integrated circuits; CMOS technology; Frequency measurement; Gain; Power amplifiers; Power generation; System-on-chip; 90nm CMOS; V-band; on-chip transformer; power amplifier; power combination;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless Power Transfer Conference (WPTC), 2014 IEEE
Conference_Location :
Jeju
Type :
conf
DOI :
10.1109/WPT.2014.6839582
Filename :
6839582
Link To Document :
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