Author :
Grill, A. ; Edelstein, D. ; Restaino, D. ; Lane, M. ; Gates, S. ; Liniger, E. ; Shaw, T. ; Liu, X.H. ; Klaus, D. ; Patel, V. ; Cohen, S. ; Simonyi, E. ; Klymko, N. ; Lane, S. ; Ida, K. ; Vogt, S. ; Van Kleeck, T. ; Davis, C. ; Ono, M. ; Nogami, T. ; Ivers
Author_Institution :
IBM Res. Div., IBM T.J. Watson Res. Center, Yorktown Heights, NY, USA
Abstract :
The research integration of SiCOH films in a reliable ULSI integrated circuit chip imposes many requirements on the properties of the dielectric material. This paper describes a selection and optimization process for choosing the best film to be integrated in Cu wiring levels of ULSI CMOS chips in the 90 nm technology node.
Keywords :
CMOS integrated circuits; dielectric thin films; silicon compounds; 90 nm; Cu wiring; SiCOH; SiCOH dielectrics; SiCOH films; ULSI CMOS chips; dielectric material; optimization process; reliable ULSI integrated circuit; research integration; selection process; Adhesives; Amorphous materials; CMOS technology; Capacitance measurement; Dielectric measurements; Mechanical factors; Metal-insulator structures; Microelectronics; Semiconductor films; Ultra large scale integration;
