Topological testing

Topological testing is introduced and its applications are presented. Topological testing uses graph-theoretic optimization methods such as the traveling salesman problem, the Chinese postman problem, coloring, path covering, and partitioning to minimize the test time. The topological testing techniques can be applied to test a system´s behavior and its organization at each level of the system´s hierarchy, namely, circuit, logic, register transfer, instruction, and processor-memory-switch levels. Specifically, the topological testing approach is demonstrated by developing tests for the multistage interconnection network and the hypercube network. Time optimization for the testing of these networks gives very promising results by taking advantage of inherent parallelism and removing test redundancy. Three-orders-of-magnitude improvement is achieved by applying topological testing techniques to the testing of an existing multistage interconnection network