DocumentCode
1616159
Title
Optimal implementation of sea of leads (SoL) compliant interconnect technology
Author
Dang, B. ; Patel, C. ; Thacker, H. ; Bakir, M. ; Martin, K. ; Meindl, J.
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear
2004
Firstpage
99
Lastpage
101
Abstract
Compliant interconnects can enable wafer level packages with high I/O density, high reliability and better performances with low cost and small size. A fabrication process for SoL compliant interconnects has been optimized to achieve high yield and compatibility with standard back-end-of-line (BEOL) as well as flip-chip bonding processes. The optimized fabrication process further enables a reliable joining between the IC and SoL compliant interconnects to the next level of packaging without the use of an expensive underfilling process.
Keywords
integrated circuit bonding; integrated circuit interconnections; optimisation; I/O density; Pb; SoL compliant interconnects; back-end-of-line; fabrication process optimization; flip-chip bonding; high yield; interconnect fabrication; interconnect performance; optimal implementation; reliability; reliable joining; sea of leads; wafer level packages; Capacitive sensors; Costs; Dielectric substrates; Etching; Fabrication; Intermetallic; Lead; Semiconductor device packaging; Soldering; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Interconnect Technology Conference, 2004. Proceedings of the IEEE 2004 International
Conference_Location
Burlingame, CA, USA
Print_ISBN
0-7803-8308-7
Type
conf
DOI
10.1109/IITC.2004.1345703
Filename
1345703
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