DocumentCode
1616348
Title
Efficiency of Lee´s routing algorithm on a transputer network
Author
Sagar, V.K. ; Haag, B.
Author_Institution
Dept. of Electron. Syst. Eng., Essex Univ., Colchester, UK
fYear
1992
Firstpage
1090
Abstract
The authors present research into how efficient Lee´s routing algorithm could be on general-purpose parallel hardware such as a network of transputers. Several different versions of the software architecture for a transputer network were examined to assess how best to implement a parallel version of Lee´s algorithm. The simulations done show that the parallel versions are faster than the sequential version only if a great number of transputers are used and the small speedup obtained makes the tested methods not very cost effective
Keywords
VLSI; circuit layout CAD; network routing; transputer systems; Lee´s routing algorithm; VLSI; general-purpose parallel hardware; software architecture; transputer network; Computer architecture; Routing; Signal processing; Software algorithms; Software architecture;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location
Washington, DC
Print_ISBN
0-7803-0510-8
Type
conf
DOI
10.1109/MWSCAS.1992.271104
Filename
271104
Link To Document