• DocumentCode
    16164
  • Title

    High-Speed Multicast Scheduling in Hybrid Optical Packet Switches with Guaranteed Latency

  • Author

    Zhiyang Guo ; Yuanyuan Yang

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Stony Brook Univ., Stony Brook, NY, USA
  • Volume
    62
  • Issue
    10
  • fYear
    2013
  • fDate
    Oct. 2013
  • Firstpage
    1972
  • Lastpage
    1987
  • Abstract
    In this paper, we study multicast scheduling in the OpCut switch, a recently proposed hybrid optical/electronic switching architecture for transmitting high-volume traffic in core networks and parallel computers. First, we present a multicast scheduling algorithm called Guaranteed Latency Multicast Scheduling (GLMS) that considers the schedule of each packet for multiple time slots. We show that GLMS has several desirable features, such as guaranteed latency for all transmitted packets and adaptivity to transmission requirements. To relax the time constraint on computing a schedule, we further propose a parallel and pipeline processing architecture for GLMS that distributes the scheduling task to multiple pipelined processing stages, with N processors in each stage, where N is the switch size. Finally, by implementing it with simple combination logic circuits, we show that each processor can finish the scheduling for one time slot in (O(1)time complexity. We evaluate the performance of GLMS extensively against statistical traffic models and real Internet traffic, and the results show that the proposed GLMS algorithm can achieve very low average packet latency with minimum packet drop ratio.
  • Keywords
    Internet; combinational circuits; computational complexity; multicast communication; optical switches; packet switching; parallel architectures; pipeline processing; processor scheduling; telecommunication traffic; GLMS; Internet traffic; OpCut switch; combination logic circuits; core network; electronic switching architecture; guaranteed latency multicast scheduling; high speed multicast scheduling; high-volume traffic transmission; hybrid optical packet switch; hybrid optical switching architecture; packet latency; packet scheduling; parallel computer; parallel processing architecture; pipeline processing architecture; processor scheduling; statistical traffic model; time complexity; time constraint; time slot; Optical buffering; Optical packet switching; Optical switches; Processor scheduling; Receivers; Scheduling; Vectors; Optical packet switching; hardware implementation; hybrid optical/electronic switch; latency guarantee; multicast scheduling; optical interconnects; parallel; pipeline;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/TC.2012.125
  • Filename
    6212459