CMOS clamped-swing logic (CMOS CSL) and CMOS differential clamped-swing logic (CMOS DCSL)

Two new static CMOS logic circuits called the CMOS clamped-swing logic and the CMOS differential clamped-swing logic are proposed and analyzed. In these two new logic circuits, the internal circuit used to realize the logic functions has a small voltage swing, whereas the output signal has a normal swing compatible with other CMOS logic. Both new logic circuits allow a complex function to be implemented within a single gate and achieve a high operation speed. They show a good trade-off among speed, area, DC power dissipation, and noise margin. They can be used along with the conventional CMOS circuits. Thus, design flexibility and speed performance of digital CMOS ICs can be further enhanced