A piecewise-linear 10b DAC architecture with drain-current modulation for compact AMLCD driver ICs

DACs in data-driver ICs for active-matrix LCD (AMLCD) systems play the key role of data voltage generation. Especially stringent requirements are imposed on the DACs for AMLCD data drivers: uniform performance in each data channel, and compactness in chip implementation, as well as extremely low power consumption. The prevalent use of resistor-DAC (RDAC) architectures is partly owing to their uniform characteristics, because each RDAC in the data channels shares a common resistor string for reference voltage. In this paper, a piecewise-linear 10 b DAC architecture is introduced. An interpolation scheme with drain-current modulation shows uniform channel performance, and keeps the 10 b data driver size smaller than that of a conventional 8 b driver. The DAC architecture requires no modification to the conventional data-driver structure except for the addition of a minimal number of circuits for drain-current modulation. The chip is fabricated in a 0.1 mum CMOS process.