Title :
AND/EXOR-based synthesis of testable KFDD-circuits with small depth
Author :
Hengster, Harry ; Drechsler, Rolf ; Eckrich, Stefan ; Pfeiffer, Tonja ; Becker, Bernd
Author_Institution :
Inst. of Comput. Sci., Albert-Ludwigs-Univ., Freiburg, Germany
Abstract :
Decision Diagrams are used in design automation for efficient representation of Boolean functions. It is also possible to directly derive circuits from Decision Diagrams. In this paper we present an approach to synthesize circuits from a very general class of Decision Diagrams, the ordered Kronecker Functional Decision Diagrams. These Decision Diagrams make use of Davio decompositions which are based on exclusive-or operations and therefore allow the use of EXOR gates in the synthesized circuits. We investigate area, depth, and testability of these circuits and compare them to circuit designs generated by other synthesis tools. Experimental results show that the presented approach is suitable to overcome the trade-off between depth and testability at the price of reasonable area overhead
Keywords :
Boolean functions; automatic testing; built-in self test; combinational circuits; design for testability; directed graphs; fault diagnosis; logic CAD; logic testing; matrix multiplication; minimisation of switching nets; reachability analysis; AND/EXOR-based synthesis; Boolean functions; Boolean matrix multiplication; Davio decompositions; EXOR gates; Shannon decomposition; combinational circuits; design automation; directed acyclic graph; logic minimization; ordered Kronecker functional decision diagrams; reachability matrices; reasonable area overhead; small depth; stuck at fault testability; testable KFDD-circuits; Automatic testing; Boolean functions; Circuit faults; Circuit synthesis; Circuit testing; Computer science; Data structures; Delay; Design automation; System testing;
Conference_Titel :
Test Symposium, 1996., Proceedings of the Fifth Asian
Conference_Location :
Hsinchu
Print_ISBN :
0-8186-7478-4
DOI :
10.1109/ATS.1996.555152