Title :
Quantum dot cellular automata magnitude comparators
Author :
Ghosh, Bablu ; Gupta, Swastik ; Kumari, Smriti
Author_Institution :
Dept. of Electr. Eng., IIT Kanpur, Kanpur, India
Abstract :
In this paper, first a 1-bit magnitude comparator design is presented that reduces the number of QCA cells compared to previously reported design. The proposed design requires only about 49% of the area as compared to previous design with the same speed and clocking performance. Then, we have proposed novel 2 and 3 bit comparator designs in QCA.
Keywords :
cellular automata; comparators (circuits); network synthesis; quantum dots; 2 bit comparator designs; 3 bit comparator designs; QCA cells; clocking performance; quantum dot cellular automata 1-bit magnitude comparator design; speed performance; storage capacity 1 bit; storage capacity 2 bit; storage capacity 3 bit; Automata; Clocks; Electrical engineering; Layout; Logic gates; Quantum dots; Simulation; magnitude comparator; quantum dot cellular automata;
Conference_Titel :
Electron Devices and Solid State Circuit (EDSSC), 2012 IEEE International Conference on
Conference_Location :
Bangkok
Print_ISBN :
978-1-4673-5694-7
DOI :
10.1109/EDSSC.2012.6482766
