DocumentCode :
1617405
Title :
Prototype design of cluster-based homogeneous Multiprocessor System-on-Chip
Author :
Geng, Luo-Feng ; Zhang, Duo-li ; Gao, Ming-Lun ; Chen, Ying-Chun ; Du, Gao-Ming
Author_Institution :
Inst. of VLSI Design, Hefei Univ. of Technol., Hefei, China
fYear :
2009
Firstpage :
311
Lastpage :
315
Abstract :
The Multiprocessor System-on-Chip (MPSoC) is a promising solution for future complex computer and embedded systems. And, the Network-on-Chip (NoC) has been proposed as the future on-chip interconnection. Whereas, the NoCs bring more challenge on parallel programming and synchronization of different processor cores. This paper proposes a new cluster-based homogeneous MPSoC architecture, which adopts the hybrid interconnection composed of both bus-based and NoC architecture. This architecture has been implemented as a prototype by FPGA device, which integrates 17 processor cores. The performances of this prototype are evaluated under two real applications, matrix chain multiplication and JPEG picture decoding. The speedup ratio of this prototype is up to 15.850.
Keywords :
embedded systems; field programmable gate arrays; multiprocessor interconnection networks; network-on-chip; prototypes; FPGA; cluster-based homogeneous multiprocessor system-on-chip; embedded systems; network-on-chip; on-chip interconnection; prototype design; Computer architecture; Decoding; Embedded computing; Embedded system; Field programmable gate arrays; Multiprocessing systems; Network-on-a-chip; Parallel programming; Performance evaluation; Prototypes; Cluster-based architecture; FPGA Prototype design; Multiprocessor System-on-Chip (MPSoC); Network-on-Chip (NoC);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Anti-counterfeiting, Security, and Identification in Communication, 2009. ASID 2009. 3rd International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-3883-9
Electronic_ISBN :
978-1-4244-3884-6
Type :
conf
DOI :
10.1109/ICASID.2009.5276896
Filename :
5276896
Link To Document :
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