Title :
A plasma damage resistant ultra low-k hybrid dielectric structure for 45nm node copper dual-damascene interconnects
Author :
Nakamura, N. ; Yoshizawa, T. ; Watanabe, T. ; Miyajima, H. ; Nakao, S. ; Yamada, N. ; Fujita, K. ; Matsunaga, N. ; Shibata, H.
Author_Institution :
SoC R&D Center, Toshiba Corp., Kanagawa, Japan
Abstract :
A plasma damage resistant hybrid (polyarylene ether (PAR)/SiOC) dielectric structure using the ultra low-k (ULK) films with k value of 2.2 was demonstrated for Cu dual-damascene (DD) interconnects. The reliability issues attributed to plasma process induced damage to ULK films were clarified and resolved. As well as ULK film selection with plasma damage resistance, insertion of a low-k buffer layer with k value of 3.0 between SiOC and PAE and damage restoration process using hydrophobic treatment were found to be most important factors for robust ULK process integration.
Keywords :
copper; dielectric thin films; integrated circuit interconnections; plasma materials processing; silicon compounds; 45 nm; Cu; SiOC; ULK process integration; copper dual-damascene interconnects; damage restoration process; hydrophobic treatment; low-k buffer layer; plasma damage resistance; plasma process; polyarylene ether; reliability issues; ultra low-k films; ultra low-k hybrid dielectric structure; Condition monitoring; Copper; Degradation; Dielectric devices; Etching; Plasma applications; Plasma devices; Plasma materials processing; Plasma properties; Wire;
Conference_Titel :
Interconnect Technology Conference, 2004. Proceedings of the IEEE 2004 International
Print_ISBN :
0-7803-8308-7
DOI :
10.1109/IITC.2004.1345756
