Analogue integrated circuit synthesis from VHDL-AMS behavioural specifications

While digital circuit designs are now fully automated and can be delivered extremely quickly, the analogue part of a typical ASIC still needs to be designed manually. This paper discusses a way forward to overcome one of the obvious difficulties in analogue synthesis namely the lag in the development of appropriate synthesis methodologies to support mixed-signal ASICs. The recent emergence of VHDL-AMS has enabled high-level analogue descriptions to be synthesized into hardware automatically. An example of synthesis and optimization of a 1 GHz VLSI LC bandpass filter is presented based on identification of synthesizable constructs from a VHDL-AMS parse tree