Title :
A passive RFID tag IC development platform
Author :
Hong, Yang ; Ng, Yuen Sum ; Chan, Chi Fat ; Guo, Jianping ; Shi, Weiwei ; Ho, Marco ; Ai, Yanqing ; Mak, Ki-Leung ; Leung, Ka Nang ; Choy, Chiu Sing ; Pun, Kong Pang ; Leung, Lincoln Lai Kan
Author_Institution :
Dept. of Electron. Eng., Chinese Univ. of Hong Kong, Shatin, China
Abstract :
This paper presents a development platform to generate passive UHF RFID tags compatible with EPCTM C1G2 protocol. The platform is based on one RFID tag IC prototype implemented in a 130nm CMOS technology. Some features of the tag IC include that a voltage multiplier implemented by diode-connected NMOSFETs, a voltage regulator composed of a self-biased mutual compensation without large resistors for area-saving, and an energy-aware irregular clock structure with clock gating used in the baseband processor. To further reduce the chip area for low production cost and meet different specifications, the platform design manages to achieve different floorplans according to different user-defined requirements, mainly focusing on the communicating distances. This approach simplifies the design flow, and, most importantly, shortens time-to-market.
Keywords :
CMOS integrated circuits; MOSFET; clocks; radiofrequency identification; resistors; CMOS technology; EPCTM C1G2 protocol; baseband processor; clock gating; diode-connected NMOSFET; energy-aware irregular clock structure; passive RFID tag IC development platform; passive UHF RFID tags; resistors; self-biased mutual compensation; voltage regulator; CMOS integrated circuits; CMOS technology; Clocks; Diodes; MOSFETs; Passive RFID tags; Protocols; Prototypes; RFID tags; Voltage; baseband processor; reconfigurable RFID; voltage multiplier; voltage reference;
Conference_Titel :
Anti-counterfeiting, Security, and Identification in Communication, 2009. ASID 2009. 3rd International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-3883-9
Electronic_ISBN :
978-1-4244-3884-6
DOI :
10.1109/ICASID.2009.5276902
