Title :
Design and implementation of MTJ-based register
Author :
Jiang, Yanfeng ; Ju, Jiaxin ; Zhang, Xiaobo ; Yang, Bing
Author_Institution :
Dept. of Microelectron., North China Univ. of Technol., Beijing, China
Abstract :
A novel register, in which MTJ device is centered, is proposed in this paper. Based on the demand of MTJ´s reading and writing process, some additional devices have been integrated with the MTJ device to compose the actual structure. It has been simulated using HSPICE and the simulated result shows that it can be operated as a register in the circuit. Moreover, the layout of the register based on 0.5 mum CMOS process has been finished.
Keywords :
CMOS logic circuits; SPICE; integrated circuit layout; logic design; magnetic tunnelling; shift registers; CMOS process; Hspice; MTJ-based register design; reading process; register layout; size 0.5 mum; writing process; CMOS technology; Circuit simulation; Clocks; Field programmable gate arrays; Flip-flops; Inverters; Random access memory; Read only memory; Registers; Sequential circuits; Integrated circuit; MTJ; Register;
Conference_Titel :
Anti-counterfeiting, Security, and Identification in Communication, 2009. ASID 2009. 3rd International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-3883-9
Electronic_ISBN :
978-1-4244-3884-6
DOI :
10.1109/ICASID.2009.5276903
