DocumentCode :
1617815
Title :
Lateral IGBT in thin SOI process for high voltage ESD application
Author :
Jian Wu ; Shurong Dong ; Yan Han ; Jie Zeng ; Fei Ma ; Jianfeng Zheng
Author_Institution :
Dept. of Inf. Sci. & Electron. Eng., Zhejiang Univ., Hangzhou, China
fYear :
2012
Firstpage :
1
Lastpage :
3
Abstract :
A high voltage laterally insulated-gate-bipolar-transistor (LIGBT) built in ultra-thin silicon-on-insulator (SOI) is reported. A theoretical analysis about the efficient approach to increasing the holding voltage of LIGBT starting with BJT´s has been proposed. Higher holding voltage and almost the same turn-on speed is achieved by segmenting the emitter area of LIGBT to increase the resistance.
Keywords :
bipolar transistors; electrostatic discharge; insulated gate bipolar transistors; silicon-on-insulator; BJT; LIGBT holding voltage; emitter area segmentation; high voltage ESD application; high voltage LIGBT; high voltage laterally insulated-gate-bipolar-transistor; lateral IGBT; thin SOI process; Breakdown voltage; Current measurement; Electrostatic discharges; Insulated gate bipolar transistors; Resistance; Silicon-on-insulator; Transistors; ESD; LDMOS; LIGBT; SOI; Segment;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices and Solid State Circuit (EDSSC), 2012 IEEE International Conference on
Conference_Location :
Bangkok
Print_ISBN :
978-1-4673-5694-7
Type :
conf
DOI :
10.1109/EDSSC.2012.6482784
Filename :
6482784
Link To Document :
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