DocumentCode :
1618231
Title :
The symmetric hypernets-design and analysis
Author :
Kaushal, R.P. ; Bedi, J.S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Wayne State Univ., Detroit, MI, USA
fYear :
1992
Firstpage :
863
Abstract :
K. Hwang and J. Ghosh (1987) proposed an interconnection network called a hypernet which has a constant node degree and is easily expandable. However, its component count increases unsymmetrically with the increase in size. The authors propose a topology called a symmetric hypernet which grows symmetrically with the increase in dimension and hierarchical level. Symmetric hypernets have two types of physical nodes, the processing nodes (PEs) which perform data processing tasks only and PE/IO nodes which perform both data processing and input/output tasks. Symmetric hypernets are a good alternative to hypercube topology for constructing moderate size parallel machines. They have slightly more internal links than the hypernets suggested by Hwang and Ghosh but have a relatively small diameter for moderate size networks, better reliability, smaller overall average distance and overall normalized average distance, better fault tolerance, more alternative paths between any two nodes, and low traffic density. Simple addressing rules resulted in a simple and efficient mapping algorithm. The PE/IO nodes are placed uniformly in the network and have separate and predefined addresses. Location of the PE nodes and PE/IO nodes is predetermined, which results in simple and efficient VLSI design. Network expansion is very gradual and uniform
Keywords :
fault tolerant computing; hypercube networks; parallel machines; PE/IO nodes; VLSI design; addressing rules; fault tolerance; mapping algorithm; overall average distance; overall normalized average distance; parallel machines; physical nodes; processing nodes; reliability; symmetric hypernet; traffic density; Data processing; Hardware; Hypercubes; Mercury (metals); Multiprocessing systems; Multiprocessor interconnection networks; Network topology; Parallel processing; Power system interconnection; Supercomputers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
Type :
conf
DOI :
10.1109/MWSCAS.1992.271188
Filename :
271188
Link To Document :
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