DocumentCode
1618348
Title
A pipelined, high-precision FFT architecture
Author
Hopkinson, Thomas M. ; Butler, G. Michael
Author_Institution
The Mitre Corp., Bedford, MA, USA
fYear
1992
Firstpage
835
Abstract
Presents a highly integrated, high-precision fast Fourier transform (FFT) architecture. A 1.2-μm CMOS implementation of this architecture has yielded a 32-b, 64K-point FFT that operates at a continuous four-million-samples-per second data rate. All FFT support functions, including coefficient generation and memory interfacing, are included on-chip. The heart of this architecture is a monolithic radix-4 FFT processor implemented as a full-custom VLSI circuit
Keywords
CMOS integrated circuits; VLSI; digital signal processing chips; fast Fourier transforms; pipeline processing; 1.2 micron; 32 bits; CMOS; coefficient generation; fast Fourier transform; full-custom VLSI circuit; memory interfacing; monolithic radix-4 FFT processor; pipelined processing; support functions; Application specific integrated circuits; Arithmetic; Computer architecture; Digital signal processing chips; Fast Fourier transforms; Fourier transforms; Radar signal processing; Signal processing algorithms; Spread spectrum radar; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location
Washington, DC
Print_ISBN
0-7803-0510-8
Type
conf
DOI
10.1109/MWSCAS.1992.271194
Filename
271194
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