An edge-missing compensator for fast-settling wide-locking-range PLLs

An ideal phase detector (PD) produces an output signal whose DC value is linearly proportional to the phase difference (Deltathetas) between the phases of its two periodic inputs. In practice, however, the transfer curve of the PD may not be linear or even monotonic for large Deltathetas . With a nonlinear PD, the transient response of PLL cannot be easily formulated and slow down the acquisition behavior.This work presents an edge-missing compensator (EMC) that has arbitrary width of linear operation region. The EMC also can precisely compensate the missing edges to speed up the acquisition of PLL with low power and smaller area. Precisely counting the number of missing edges is not an easy task. One may count the number of edges in both input signals. However when Deltathetas exceeds the range of plusmn2pi, miscounting occurs when the both input signals raise at the same time. On the other hand, some literatures interfacing with PFD to achieve fast locking feature, but the loop parameters are sensitive and may not be appropriately applied for diverse PLL applications.