DocumentCode
1618721
Title
Design of an efficient unification processor
Author
Biswas, Priyanka ; Yun, D.Y.Y. ; Xu, Y.R.
Author_Institution
Dept. of Comput. Sci. & Eng., Southern Methodist Univ., Dallas, TX, USA
fYear
1988
Firstpage
4
Lastpage
13
Abstract
A novel architecture is proposed for a unification processor based on a linear (parallel substitution) unification (LPSU) algorithm. The operations of parallel search and substitution are supported through associative techniques. The unification processor (UP) can be used as a coprocessor in a closely-coupled multiprocessing environment or as a processing resource in a distributed environment
Keywords
artificial intelligence; content-addressable storage; logic programming; parallel architectures; symbol manipulation; architecture; associative techniques; closely-coupled multiprocessing environment; coprocessor; distributed processing; linear parallel substitution unification algorithm; parallel search; unification processor; Algorithm design and analysis; Application software; Artificial intelligence; Computer architecture; Computer science; Coprocessors; Hardware; Laboratories; Microprogramming; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Computers and Communications, 1988. Conference Proceedings., Seventh Annual International Phoenix Conference on
Conference_Location
Scottsdale, AZ
Print_ISBN
0-8186-0830-7
Type
conf
DOI
10.1109/PCCC.1988.10034
Filename
10034
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