DocumentCode
1618746
Title
A high-frequency BiCMOS buffer for testing analog ICs
Author
Setty, Palaksha ; Bliss, William G.
Author_Institution
Crystal Semicond. Inc., Austin, TX, USA
fYear
1992
Firstpage
768
Abstract
Debugging large mixed-signal ICs involves monitoring several critical internal nodes that connect to various sub-systems. Direct accessing of these nodes may or may not be feasible depending on the drive capability of the node involved. Hence, a suitable on-chip buffer that facilitates the proper monitoring of the internal node is necessary. A compact BiCMOS buffer to accomplish this is presented. The buffer has an area of less than 0.09 mm2, and has a 3-dB bandwidth in excess of 50 MHz. Total DC operating current is 1.8 mA at 5-V supply
Keywords
BiCMOS integrated circuits; buffer circuits; integrated circuit testing; mixed analogue-digital integrated circuits; 1.8 mA; 3-dB bandwidth; 5 V; 50 MHz; DC operating current; analog ICs; critical internal nodes; drive capability; high-frequency BiCMOS buffer; internal node; mixed-signal ICs; on-chip buffer; Bandwidth; BiCMOS integrated circuits; Capacitance; Circuit testing; Debugging; Digital circuits; Dynamic range; Integrated circuit interconnections; Monitoring; Test equipment;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location
Washington, DC
Print_ISBN
0-7803-0510-8
Type
conf
DOI
10.1109/MWSCAS.1992.271212
Filename
271212
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