Linear current integrator with parasitic components compensation

This work presents the method to enhance the linearity of current integration. Through utilizing the parasitic model of capacitance, we develop an extraction method to estimate parasitic components concerning with linearity of integration. The further use of negative impedance converter provides adjustable negative impedance for compensating redundant parasitic components. The resulted impedance is almost pure capacitance enabling the possibility of very linear current integration. The simulation results show that the proposed method is able to generate very linear ramp signal for constant current source. The differential and integral nonlinearity of integration is almost reduced to one-twentieth of that without compensating.