DocumentCode
1619396
Title
HBM ESD EDA check method applied to complete smart power IC´s — Functional initialization and implementation
Author
Gevinti, Eleonora ; Fragnoli, Mauro ; Cerati, Lorenzo ; Bogani, Antonio ; Andreini, Antonio
Author_Institution
STMicroelectron., Agrate Brianza, Italy
fYear
2013
Firstpage
1
Lastpage
10
Abstract
A functional approach to check global IC ESD schematic network correctness and protected circuitry ESD compliance using Calibre® Mentor PERC is presented and applied to Smart Power IC product. Developed checker exploits an initialization method able to accurately define ESD paths. The project follows ESD Association EDA International Working Group guidelines.
Keywords
electronic design automation; electrostatic discharge; integrated circuit design; power integrated circuits; Calibre Mentor PERC; EDA International Working Group guidelines; ESD Association; ESD paths; HBM ESD EDA check method; global IC ESD schematic network correctness; protected circuitry ESD compliance; smart power IC; Clamps; Electrostatic discharges; Integrated circuits; Network topology; Pins; Robustness; Voltage control;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2013 35th
Conference_Location
Las Vegas, NV
ISSN
0739-5159
Type
conf
Filename
6635921
Link To Document