DocumentCode
1619780
Title
High fan-in circuit design
Author
Clark, Lawrence T. ; Taylor, Gregory F.
Author_Institution
Intel Corp., USA
fYear
1994
Firstpage
27
Lastpage
32
Abstract
A review of high fan-in circuit design in contemporary logic technologies is presented. This is followed by a description of a BiNMOS circuit structure which allows the construction of large fan-in, dynamic logical NAND or OR functions. Power and reliability considerations such as BJT reverse Vbe and MOS hot electron protection are included. Application of the circuit in the 3.3 V, 100 MHz, implementation of the Pentium Microprocessor on a 0.6 mm BiNMOS process is discussed
Keywords
BiCMOS integrated circuits; Capacitance; Circuit noise; Circuit synthesis; Degradation; Delay; Fault location; MOS devices; Microprocessors; Protection;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting,1994., Proceedings of the 1994
Conference_Location
Minneapolis, MN
Print_ISBN
0-7803-1316-X
Type
conf
DOI
10.1109/BIPOL.1994.587847
Filename
587847
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