Title :
A novel VLSI-architecture for motion-estimation: the picture processing RAM
Author_Institution :
Siemens, AG, Munich, Germany
Abstract :
A novel VLSI-architecture for processing the motion-estimation algorithm is presented. It is based on a modified frame memory to which additional logic circuits have been added. This leads to a low-cost realization of motion estimation since an additional processing unit is unnecessary
Keywords :
VLSI; image processing equipment; motion estimation; video equipment; VLSI-architecture; logic circuits; modified frame memory; motion-estimation; picture processing RAM; Bandwidth; Data compression; Discrete cosine transforms; Hardware; Image processing; Motion estimation; Motion pictures; Read-write memory; Streaming media; Video compression;
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
DOI :
10.1109/MWSCAS.1992.271268
