Title :
Simulation of high-speed VLSI circuits using overlapped partitioning algorithm
Author :
Fang, W. ; Mokari, M.E.
Author_Institution :
Dept. of Electr. & Comput. Eng., Ohio Univ., Athens, OH, USA
Abstract :
Transient simulation of high-speed VLSI circuits is very time-consuming. A fast and robust overlapped waveform realization (OWR) algorithm is presented. From the simulation results, it is concluded that the larger the circuit, the better the speedup compared to a direct SPICE-like method. The OWR algorithm is about twice as fast as the waveform relaxation method for high-speed circuits. With this algorithm, simulations of high-speed bipolar and BiCMOS VLSI circuits are possible within reasonable time
Keywords :
BiCMOS integrated circuits; VLSI; bipolar integrated circuits; circuit analysis computing; digital simulation; BiCMOS; OWR algorithm; bipolar ICs; digital simulation; high-speed VLSI circuits; overlapped partitioning algorithm; overlapped waveform realization; Circuit simulation; Computational modeling; Convergence; Coupling circuits; Digital circuits; Equations; Partitioning algorithms; Robustness; SPICE; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
DOI :
10.1109/MWSCAS.1992.271269
