DocumentCode :
1620155
Title :
SE6: Interleaving ADC´s - exploiting the parallelism
Author :
Roovers, Raf
Author_Institution :
NXP Semiconductors, Eindhoven, Netherlands
fYear :
2009
Firstpage :
518
Lastpage :
518
Abstract :
Why are interleaving ADC´s becoming more and more popular in recent years? Are other ADC architectures running out of steam and will interleaving ADC´s be the standard in the near future just as multi-core micro-processors are replacing single core? In this session an overview of recent developments in interleaving ADC´s is shown. Due to the shrinking area of a single converter, many slices can be integrated in parallel resulting in a new degree of freedom for ADC designers, resulting in higher speeds, better efficiency and more flexibility.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference - Digest of Technical Papers, 2009. ISSCC 2009. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-3458-9
Type :
conf
DOI :
10.1109/ISSCC.2009.4977543
Filename :
4977543
Link To Document :
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