• DocumentCode
    1620260
  • Title

    Influence of package parasitic elements on CDM stress

  • Author

    Di Sarro, James ; Reynold, Bill ; Gauthier, R.

  • Author_Institution
    IBM Semicond. R&D Center, Essex Junction, VT, USA
  • fYear
    2013
  • Firstpage
    1
  • Lastpage
    9
  • Abstract
    CDM current waveform properties show a strong dependence on pin type and location due to package transmission line effects. I/O pin waveforms have a depressed peak, slower rise time, and increased pulse width compared to power supply waveforms, with the offset increasing with the distance from the package center. Simulations illustrate that the internal current through the ESD protection network on the die can deviate significantly from the external current observed in the CDM system for long package traces.
  • Keywords
    electronic equipment testing; electronics packaging; electrostatic discharge; waveform analysis; CDM current waveform properties; CDM stress; ESD protection network; I/O pin waveforms; charged device model; package center; package parasitic elements; package transmission line effects; power supply waveforms; pulse width; rise time; Capacitance; Current measurement; Market research; Pins; Power measurement; Shape; Time measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2013 35th
  • Conference_Location
    Las Vegas, NV
  • ISSN
    0739-5159
  • Type

    conf

  • Filename
    6635952