Circuit implementation of Spike Time Dependent Plasticity (STDP) for artificial synapse

Author

Wu, H.T. ; Xu, Z.T. ; Hu, S.G. ; Yu, Qian ; Liu, Yanbing

Author_Institution

State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China

fYear

2012

Firstpage

1

Lastpage

2

Abstract

Synapses are crucial elements for computation and information storage in both human brain and artificial neural systems. This paper presents a compact implementation of synaptic strength modification circuit based on a resistive switching device. The circuit works according to a Spike Time Dependent Plasticity (STDP) rule, ensuring that the timing between pre and post synaptic spikes lead to the Long Term Potentiation (LTP) and the Long Term Depression (LTD), and the modification of resistance in resistive switching device, finally the strength of synaptic connections is modified. This circuit is designed under a 0.13um CMOS technology. The proposed circuit is suitable for CMOS implementation of neuromorphic architectures.

Keywords

neural nets; neurophysiology; CMOS technology; artificial neural system; artificial synapse; human brain; information storage; long term depression; long term potentiation; neuromorphic architectures; resistive switching device; spike time dependent plasticity rule; synaptic connections; synaptic spikes; synaptic strength modification circuit; Biological neural networks; CMOS integrated circuits; Computer architecture; Neurons; Switches; Switching circuits; Timing; neural network; resistive switching device; spike time dependent plasticity; synapse; synaptic weight;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid State Circuit (EDSSC), 2012 IEEE International Conference on

Conference_Location

Bangkok

Print_ISBN

978-1-4673-5694-7

Type

conf

DOI

10.1109/EDSSC.2012.6482892

Filename

6482892