Trench DRAM structures for the analysis of two- and three-dimensional leakage phenomena

Author

Voldman, Steven H.

Author_Institution

IBM, Essex Junction, VT, USA

fYear

1990

Firstpage

97

Lastpage

102

Abstract

Two- and three-dimensional leakage phenomena in moderately and heavily doped and gate diode structures are analyzed using a novel set of macro-array trench DRAM (dynamic random-access memory) capacitor storage nodes and planar MOS drain structures. Heavily doped gated diode structures (trench and planar) are used for the analysis of the gate-induced thermal generation mechanism and band-to-band tunneling. The results are relevant for understanding the leakage phenomena in trench DRAM and MOSFET drain structures

Keywords

DRAM chips; MOS integrated circuits; tunnelling; MOSFET drain structures; band-to-band tunneling; capacitor storage nodes; gate diode structures; gate-induced thermal generation mechanism; heavily doped structures; macro-array trench DRAM; planar MOS drain structures; three-dimensional leakage phenomena; two-dimensional leakage phenomena; EPROM; Implants; Leakage current; MOS capacitors; MOSFET circuits; Power MOSFET; Random access memory; Semiconductor device testing; Semiconductor diodes; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 1991. ICMTS 1991. Proceedings of the 1991 International Conference on

Conference_Location

Kyoto

Print_ISBN

0-87942-588-1

Type

conf

DOI

10.1109/ICMTS.1990.161720

Filename

161720