DocumentCode :
1620698
Title :
Improving stress effect and low noise design of the integrated on-panel TFT gate driver
Author :
Huang, Nan Xiong ; Shiau, Miin Shyue ; Wu, Hong-Chong ; Liu, Don Gey
Author_Institution :
Grad. Inst. of Electr. & Commun. Eng., Feng Chia Univ., Taichung, Taiwan
fYear :
2010
Firstpage :
269
Lastpage :
272
Abstract :
In this paper, the reliable on-panel display gate driver is designed not only decreasing the fluctuation noise of the output signal, but also reducing the voltage stress effect of the dual pull-down transistors. The long-term high gate to source voltage causes the threshold voltage increased, and the fluctuation-noise on the output is coupled from the parasitical capacitance when the clock switches. Our work improved the stress effect of transistor of dual pull-down by reduced the controlled signal voltage and it maintained the anti-floating low noise structure. This gate driver was simulated by the Smart-SPICE level-35 for the α-Si TFT process model.
Keywords :
liquid crystal displays; noise; stress effects; thin film transistors; anti-floating low noise structure; clock switches; dual pull-down transistors; integrated on-panel TFT display gate driver; liquid crystal displays; output signal fluctuation noise; parasitical capacitance; smart-SPICE level-35; thin film transistors; threshold MIXDES voltage; voltage stress effect; Driver circuits; Logic gates; Noise; Stress; Thin film transistors; Voltage control; fluctuation noise; gate driver; stress effect;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Mixed Design of Integrated Circuits and Systems (MIXDES), 2010 Proceedings of the 17th International Conference
Conference_Location :
Warsaw
Print_ISBN :
978-1-4244-7011-2
Electronic_ISBN :
978-83-928756-4-2
Type :
conf
Filename :
5551645
Link To Document :
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