Title :
A CMOS process compatible high density magnetoresistive memory
Author :
Ranmuthu, I.W. ; Ranmuthu, K.T.M. ; Kohl, C. ; Comstock, C.S. ; Hassoun, M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Abstract :
A 128 K×8 bit random accessible nonvolatile magnetoresistive (MR) memory is presented. It has a cell size of 2.8×10 μm2 and is CMOS process compatible. A differential sensing scheme with dummy cells is used to eliminate unwanted pickup. MR memory cells have shown to be radiation hard and infinitely writable
Keywords :
CMOS integrated circuits; magnetic film stores; magnetic multilayers; magnetoresistive devices; random-access storage; 1 Mbit; CMOS process compatible; RAM; differential sensing scheme; dummy cells; high density magnetoresistive memory; infinite writability; magnetic multilayers; nonvolatile memory; radiation hard; CMOS process; Conducting materials; Electric resistance; Magnetic materials; Magnetic multilayers; Magnetic sensors; Magnetization; Magnetoresistance; Temperature sensors; Voltage;
Conference_Titel :
Circuits and Systems, 1992., Proceedings of the 35th Midwest Symposium on
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0510-8
DOI :
10.1109/MWSCAS.1992.271299
