Void induced thermal impedance in power semiconductor modules: some transient temperature effects

Author

Katsis, D.C. ; van Wyk, J.D.

Author_Institution

Center for Power Electron. Syst., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA

Volume

3

fYear

2001

Firstpage

1905

Abstract

The operation of power semiconductor modules creates thermal stresses that grow voids in the solder die-attach layer. These voids reduce the ability of the die-attach solder layer to conduct heat from the silicon junction to the heat spreader. This results in increased thermal impedance. The effect of accelerated aging on solder bond voiding and on thermal transient behavior is investigated. Commercially packaged TO-247 style MOSFETs are power cycled, imaged, and thermally analyzed to generate a correlation between void percentage and thermal impedance.

Keywords

heat sinks; modules; power MOSFET; semiconductor device measurement; semiconductor device models; semiconductor device packaging; semiconductor device testing; soldering; thermal analysis; thermal stresses; voids (solid); TO-247 style MOSFETs; heat conduction; heat spreader; power cycling; power semiconductor modules; silicon junction; solder bond voiding; solder die-attach layer voids; thermal analysis; thermal stresses; transient temperature effects; void induced thermal impedance; Electrical resistance measurement; Electronic packaging thermal management; Impedance measurement; MOSFETs; Semiconductor device packaging; Silicon; Temperature measurement; Temperature sensors; Thermal resistance; Thermal stresses;

fLanguage

English

Publisher

ieee

Conference_Titel

Industry Applications Conference, 2001. Thirty-Sixth IAS Annual Meeting. Conference Record of the 2001 IEEE

Conference_Location

Chicago, IL, USA

ISSN

0197-2618

Print_ISBN

0-7803-7114-3

Type

conf

DOI

10.1109/IAS.2001.955790

Filename

955790