DocumentCode :
1621709
Title :
Difficult-path branch prediction using subordinate microthreads
Author :
Chappell, Robert S. ; Tseng, Francis ; Yoaz, Adi ; Patt, Yale N.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
fYear :
2002
fDate :
6/24/1905 12:00:00 AM
Firstpage :
307
Lastpage :
317
Abstract :
Branch misprediction penalties continue to increase as microprocessor cores become wider and deeper. Thus, improving branch prediction accuracy remains an important challenge. Simultaneous subordinate microthreading (SSMT) provides a means to improve branch prediction accuracy. SSMT machines run multiple, concurrent microthreads in support of the primary thread. We propose to dynamically construct microthreads that can speculatively and accurately pre-compute branch outcomes along frequently mispredicted paths. The mechanism is intended to be implemented entirely in hardware. We present the details for doing so. We show how to select the right paths, how to generate accurate predictions, and how to get this information in a timely way. We achieve an average gain of 8.4% (42% maximum) over a very aggressive baseline machine on the SPECint95 and SPECint2000 benchmark suites
Keywords :
microcomputers; parallel architectures; storage management; branch outcomes; branch prediction; difficult path branch; microprocessor; microthread predictions; mispredictions; path cache; simultaneous subordinate microthreading; Accuracy; Aggregates; Computer architecture; Hardware; Microprocessors; Performance gain; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture, 2002. Proceedings. 29th Annual International Symposium on
Conference_Location :
Anchorage, AK
ISSN :
1063-6897
Print_ISBN :
0-7695-1605-X
Type :
conf
DOI :
10.1109/ISCA.2002.1003588
Filename :
1003588
Link To Document :
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