• DocumentCode
    1621889
  • Title

    Membrane-based design and management methodology for parallel dynamically reconfigurable embedded systems

  • Author

    Wattebled, Pamela ; Diguet, Jean-Philippe ; Dekeyser, Jean-Luc

  • Author_Institution
    INRIA Lille-Nord Eur., Univ. de Bretagne Sud, Lorient, France
  • fYear
    2012
  • Firstpage
    1
  • Lastpage
    8
  • Abstract
    Partial and dynamic reconfiguration provides a relevant new dimension to design efficient parallel embedded systems. However, due to the encasing complexity of such systems, ensuring the consistency and parallelism management at runtime is still a key challenge. So architecture models and design methodology are required to allow for efficient component reuse and hardware reconfiguration management. This paper presents a distributed persistence management model and its implementation for reconfigurable multiprocessor systems on dynamically reconfigurable circuits. The proposed approach is inspired from the well-known component based models used in software applications development. Our model is based on membranes wrapping the systems components. The objective is to improve design productivity and ensure consistency by managing context switching and storage using modular distributed hardware controllers. These membranes are distributed and optimized with the aim to design self-adaptive systems by allowing dynamic changes in parallelism degree and contexts migration. Simulation and synthesis results are given to show performances and effectiveness of our methodology.
  • Keywords
    embedded systems; field programmable gate arrays; reconfigurable architectures; switching; component reuse; consistency management; context switching; distributed persistence management; dynamically reconfigurable circuits; management methodology; membrane-based design; modular distributed hardware controllers; parallel dynamically reconfigurable embedded systems; parallelism management; reconfigurable multiprocessor systems; Computer architecture; Context; Field programmable gate arrays; Hardware; IP networks; Software; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2012 7th International Workshop on
  • Conference_Location
    York
  • Print_ISBN
    978-1-4673-2570-7
  • Electronic_ISBN
    978-1-4673-2571-4
  • Type

    conf

  • DOI
    10.1109/ReCoSoC.2012.6322884
  • Filename
    6322884