Multiplication using fast multi-operand adder

A technique for high-speed multiplication using a multi-operand adder is described. The adder/accumulator is constructed in a tree structure similar to that of Wallace structure. The major difference, however, is the building blocks. Here the construction blocks are both 3-2 and 7-3 counters, as opposed to only 3-2 counters (full adders) used in the Wallace adder case. The technique is implemented for the design of a 32-b×32-b multiplier, and it is shown that the new scheme is about 14.3% faster than that of the Wallace adder scheme, with almost no extra resources being added