• DocumentCode
    1623418
  • Title

    Synthesis for variable pipelined function units

  • Author

    Ben-Asher, Yosi ; Rotem, Nadav

  • Author_Institution
    Comput. Sci. Dep., Haifa Univ., Haifa
  • fYear
    2008
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Usually, in high level hardware synthesis, all functional units of the same type have a fixed known ldquolengthrdquo (number of stages) and the scheduler mainly determines when each unit is activated. We focus on scheduling techniques for the high-level synthesis of pipelined functional units where the number of stages of these operations is a free parameter of the synthesis. This problem is motivated by the ability to create pipelined functional units, such as multipliers, with different pipe lengths. These units have different characteristics in terms of parallelism level, frequency, latency, etc. In this paper presents the variable pipeline scheduler (VPS). The ability to synthesize variable pipelined units expands the known scheduling problem of high-level synthesis to include a 2D search for a minimal number of instances and their desired number of stages. The proposed search procedure is based on algorithms that find a local minima in a d-dimensional grid, thus avoiding the need to evaluate all possible points in the space. We have implemented a C language compiler for VPS. Our results demonstrate that using variable pipeline units can reduce the overall resource usage and improve the execution time.
  • Keywords
    pipeline processing; processor scheduling; program compilers; C language compiler; d-dimensional grid; high-level synthesis; local minima; multipliers; scheduling techniques; variable pipeline scheduler; variable pipelined function units; Circuits; Costs; Delay; Embedded system; Frequency; Hardware; High level synthesis; Parallel processing; Pipeline processing; Processor scheduling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System-on-Chip, 2008. SOC 2008. International Symposium on
  • Conference_Location
    Tampere
  • Print_ISBN
    978-1-4244-2541-9
  • Electronic_ISBN
    978-1-4244-2542-6
  • Type

    conf

  • DOI
    10.1109/ISSOC.2008.4694874
  • Filename
    4694874