Title :
A new direct digital frequency synthesizer architecture for mobile transceivers
Author :
Hegazi, E.M. ; Ragaie, H.F. ; Haddara, H. ; Ghali, H.
Author_Institution :
Intergrated Circuit Lab., Ain Shams Univ., Cairo, Egypt
Abstract :
A new architecture for direct digital frequency synthesizer (DDFS) with constant oversampling ratio (OSR) is proposed. The architecture contains no ROM block. The switching pool of the digital to analog converter (DAC) is simplified allowing a 90% reduction in DAC settling time. The basic concepts of the proposed architecture are discussed and simulation results are demonstrated
Keywords :
digital-analogue conversion; direct digital synthesis; mobile radio; transceivers; DAC settling time; constant oversampling ratio; direct digital frequency synthesizer; mobile transceivers; switching pool; Clocks; Digital-analog conversion; Filters; Frequency synthesizers; Phase locked loops; Power dissipation; Read only memory; Silicon compounds; Telecommunication switching; Transceivers;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.704095
