DocumentCode :
1623807
Title :
Power dissipation estimation and advantages of low operating voltages
Author :
Packer, Lance K.
Author_Institution :
Motorola Inc., Chandler, AZ, USA
fYear :
1997
Firstpage :
234
Lastpage :
239
Abstract :
Like it or not, ready or not, operating voltage levels are going down. Power management is becoming increasingly important and fortunately it is becoming easier to accomplish. With each reduction in power supply voltage, power dissipation is reduced to approximately (V CC2new/VCC2old)×P Dold (where VCC is the operating supply voltage and PD is the power dissipation, V×1). Internal current (static and dynamic), operating frequency, and external loading must also be considered to most accurately estimate power. A reduction in power supply voltage also affects some of the items mentioned. This paper includes an equation that can be used to easily and precisely estimate power dissipation of low-voltage interface products
Keywords :
integrated circuit modelling; external loading; internal current; low-voltage interface; operating frequency; power dissipation; power management; power supply voltage; BiCMOS integrated circuits; Energy management; Equations; Frequency estimation; Logic devices; Low voltage; Power dissipation; Power supplies; Product design; Space heating;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wescon/97. Conference Proceedings
Conference_Location :
Santa Clara, CA
ISSN :
1095-791X
Print_ISBN :
0-7803-4303-4
Type :
conf
DOI :
10.1109/WESCON.1997.632342
Filename :
632342
Link To Document :
بازگشت