Title :
A reconfigurable processing system for DSP applications
Author_Institution :
Tubingen Univ., Germany
Abstract :
We present a small-scale, reconfigurable processing system. It contains four FPGAs (9 K to 13 K gate equivalents), 2 MByte Flash Memory, 256 KByte fast SRAM and a 16-bit MAC unit. The system has a PCI-bus interface and was designed to speed up DSP, image processing and computer-graphics algorithms. Examples from medical imaging are shown
Keywords :
computer graphic equipment; digital signal processing chips; field programmable gate arrays; image processing equipment; medical image processing; reconfigurable architectures; 16 bit; DSP applications; MAC unit; PCI-bus interface; SRAM; computer-graphics algorithms; flash memory; image processing algorithms; medical imaging; reconfigurable processing system; Application software; Central Processing Unit; Control systems; Coprocessors; Digital signal processing; Field programmable gate arrays; Flash memory; Image processing; Logic devices; Random access memory;
Conference_Titel :
Circuits and Systems, 1996., IEEE 39th Midwest symposium on
Conference_Location :
Ames, IA
Print_ISBN :
0-7803-3636-4
DOI :
10.1109/MWSCAS.1996.588053
