Title :
Double data rate SYNCHRONOUS DRAMs in high performance applications
Author :
Cosoroaba, Adrian B.
Author_Institution :
Fujitsu Microelectron. Inc., San Jose, CA, USA
Abstract :
Double Data Rate Synchronous DRAMs are recently introduced SDRAM type products that can offer an evolutionary change with performance advantages for all Memory Systems. These advantages are based on a synchronous I/O interface and dual edge clock based data bus with improved internal architecture that enables faster data throughput rates. Architectural differences are discussed between various memory solutions and future trends in Synchronous DRAMs. The device functionality and timing are explained as compared with single data rate SDRAMs. Performance estimations are shown for present and future DDR SDRAM products when compared with traditional commodity type DRAMs or single edge clock SDRAMs
Keywords :
DRAM chips; memory architecture; DDR SDRAM; data bus; data throughput rate; device functionality; double data rate synchronous DRAM; dual edge clock; high performance applications; internal architecture; memory system; synchronous I/O interface; timing; Bandwidth; Clocks; Costs; DRAM chips; Frequency; Microelectronics; Random access memory; SDRAM; Throughput; Timing;
Conference_Titel :
Wescon/97. Conference Proceedings
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-4303-4
DOI :
10.1109/WESCON.1997.632366
