Title :
CMOS precision half-wave rectifying transconductor
Author :
Jun, Sibum ; Ahn, Su Jin
Author_Institution :
Analog IP Tea, LG Semicon Co. Ltd., Seoul, South Korea
Abstract :
A novel CMOS half-wave rectifying transconductor is presented. The proposed circuit utilizes a simple new cascode current subtracter which is obtained from conventional cascode current mirror by a judicious reconfiguration to yield additional subtrahend signal path. The simulated DC transfer characteristic is highly linear up to 1.5 V differential input voltage and the blunt corner at zero-crossing is 20 mV. The total harmonic distortions at 100 kHz with 1.5 Vp-p in the positive half cycle are better than -46.5 dB. The usable operating frequencies are up to 10 MHz with maximum peak-to-peak input voltage and 75 μW power consumption
Keywords :
CMOS analogue integrated circuits; VLSI; integrated circuit design; rectifying circuits; 1.5 V; 100 kHz; 20 mV; 75 muW; CMOS; DC transfer characteristic; blunt corner; cascode current subtracter; differential input voltage; half-wave rectifying transconductor; peak-to-peak input voltage; positive half cycle; power consumption; precision rectifier; subtrahend signal path; usable operating frequencies; CMOS technology; Circuit simulation; Degradation; Mirrors; Piecewise linear techniques; Radio frequency; Rectifiers; Total harmonic distortion; Transconductors; Voltage;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.704098
