DocumentCode :
1624407
Title :
Parallel routing algorithms in Benes-Clos networks
Author :
Lee, Tony T. ; Liew, Soung-Yue
Author_Institution :
Dept. of Inf. Eng., Chinese Univ. of Hong Kong, Shatin, Hong Kong
Volume :
1
fYear :
1996
Firstpage :
279
Abstract :
A new parallel algorithm for route assignment in Benes-Clos network is studied. In packet switching systems, switch fabrics must be able to provide internally conflict-free paths simultaneously and to accommodate packets requesting for connections in real-time as they arrive at the inputs. Most known sequential route assignment algorithms, such as the looping algorithm for Benes (1962) networks or Clos (1953) networks, are designed for circuit switching systems where the switching configuration can be rearranged at a relatively low speed. Most existing parallel routing algorithms are not practical for packet switching because they either assume the set of connection requests is a full permutation or fail to deal with output contentions among the set of input packets. We develop a parallel routing algorithm by solving a set of Boolean equations which are derived from the connection requests and the symmetric structure of the Benes network. Our approach can handle both the partial permutations and the output contention problem easily. The time complexity of our algorithm is O(log2N), where N is the network size. Furthermore, we extend the algorithm and show that it can be applied to the Clos network if the number of central modules is a power of two
Keywords :
Boolean functions; computational complexity; multistage interconnection networks; packet switching; parallel algorithms; switching networks; telecommunication network routing; Benes networks; Benes-Clos networks; Boolean equations; Clos networks; central modules; circuit switching systems; connection requests; input packets; looping algorithm; network size; output contentions; packet switching systems; parallel routing algorithms; partial permutations; sequential route assignment algorithms; switch fabrics; symmetric structure; time complexity; Algorithm design and analysis; Equations; Fabrics; Packet switching; Parallel algorithms; Real time systems; Routing; Switches; Switching circuits; Switching systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
INFOCOM '96. Fifteenth Annual Joint Conference of the IEEE Computer Societies. Networking the Next Generation. Proceedings IEEE
Conference_Location :
San Francisco, CA
ISSN :
0743-166X
Print_ISBN :
0-8186-7293-5
Type :
conf
DOI :
10.1109/INFCOM.1996.497904
Filename :
497904
Link To Document :
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